I need a project to be done in Cadence.
The research topic is "The design of low-power high-speed flip-flop"
2) You should start with literature review, summarizing the variants of flip-flop in a proper form. We only cover one type FF, which is so called DFF. There are many other types FF you can find.
3) you should implement three FF to make a comparable study, e.g. two are from attached two papers, and one is from any FF listed in Table 1 in 2017 paper.
4) The design should include pre-layout, DRC, LVS andpost-layout simulation. Finally compare the characteristics of FF. The following features should be included:
a) Number of transistors.
b) Clock-to-Q time
e) Total power for four transitions: 0->1, 0->0, 1->1, and 1->0.
Deadline is 7 days
12 freelancers están ofertando el promedio de $268 para este trabajo
I have well experienced in doing such kind of jobs....................... Relevant Skills and Experience verilog/vhdl, cadence Proposed Milestones $333 CAD - i will do my level best