Electronic engineer with six years of experience and a solid background in FPGA firmware development.
Key strengths:
Lead the development of multiple projects involving passenger information systems.
Build data models through Matlab, and migrate complex algorithms to custom IP Cores in VHDL.
Implement various technologies across different interfaces, drivers and algorithms.
Collaborate with hardware, software and QA departments for meeting requirements, interfaces and joint debugging.
Expertise:
Platform: Xilinx FPGA
HDL Languages: VHDL, Verilog HDL
Data Modeling: Matlab
Development Tools: ISE, Vivado, Modelsim
Interfaces: I2C, I2S, DDR, SDRAM, SPI, UART, Ethernet
Programming Languages: Python, Embedded C, Assembly
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