Prakash D.

Have 6+ years of Experience in VLSI, RTL Design. Logic Design - H/W Verilog / System Verilog / VHDL Shell Scripting Perl EDA tools FPGA - Xilinx, Altera, Quartus, Vivado ASIC Serial Transceiver (GTX/GTP) 10 Gbps Expertise in USB3.1 Physical Layer and Link Layer DMA Design, AXI AMBA interface CDC, Lint cleaning RISC, MIPS Design Concepts, Logisim, Matlab, Simulink.