Need example code de-10
$30-250 AUD
Pagado a la entrega
I need a sample code on DE-10 code for utilizing the FPGA-HPS bridge with more emphasis on hardware acceleration. (C ,VHDL prefferd /Verilog).
I am trying to explore the functionality where I can write some data from HPS to the FPGA. let the FPGA process it and HPS read back the result.
I need to see some processing happening in FPGA on request from HPS . IT could be as simple as AND implementation. However a more complex example is much more appreciated.
Please no blinking LED already present in the Intel Website.
I might have future works based on how we go with this.
Nº del proyecto: #20747727
Sobre el proyecto
3 freelancers están ofertando un promedio de $222 por este trabajo
Hi I have worked on altera tools and FPGAs. Please let me know if the requirement is still there I can work on it. Thanks
Hello there, i am an electronics engineer who has more than 3 years experience in VHDL/Verilog and FPGAs and i understand you task very carefully so i think i can do it easily, efficiently and on time thanks in advanc Más
Hi I have been working on Verilog-VHDL and Xilinx and Altera FPGAs by more than 6 years. I have a custom user defined protocol made to transfer data from fpga to processor and processor to fpga. Please let me know i Más
