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ADC to gigabit MCU controler + time-stamp -- 2

€3000-5000 EUR

Cerrado
Publicado hace más de 1 año

€3000-5000 EUR

Pagado a la entrega
Develop a MCU+ADC based board, when a trigger signal reaches the board, it should sample (12 bits) 6 analog signals and read the value of a 4 byte counter on an external clock (25 to 50 MHz). The 6 x 2 bytes values of the 6 analog signals, plus the 4 bytes of the counter and 1-2 bytes for with the board identifier will be streamed via Gigabit ethernet as UDP packets (about 1000 x 20-bytes events in every packet). The board should sustain a trigger rate of the order of 1 Million per second or higher. This project should be implemented on a MCU, as it is to replace a similar board based on FPGAs. The MCU will read the external ADC (6 independent ADCS able of at least 1 Ms/s each, at 12 bits). A 32 bits MCU based on multi-core ARM at 1 GHz or more would be required to handle the trigger rate. At a first stage, the functional analysis and simulation of the board should be presented and approved. Experience with this kind of MCU and the chosen ADC should be exhibited. As a second stage, demonstrating the MCU+ADC combination with a single ADC (may be in a development board) working at the given rates, building the required UDP packets, by reading the same ADC six times (for instance) would be required. The test will be performed against an external clock for the counter, and trigger events will be simulated with a signal generator introducing pulses of enough width (say 300 ns) in the analog inputs. Schematics, PCB designs, firmware and software should be approved. The third stage would incorporate the 6 different ADCs in a dedicated board and test that it can sustain the needed rates in a more realistic scenario. Tests would be like in the previous stage, but now with 6 copies of the same signal generator pulse. As a final result, two copies of the prototype should be produced. THIS PROJECT INCLUDES STAGES ONE AND TWO. If successfull and approved, a new project will be awarded to complete phases three and four. Budget given for this project is approximated, all offers will be studied, no matter the bid.
ID del proyecto: 35632680

Información sobre el proyecto

6 propuestas
Proyecto remoto
Activo hace 1 año

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Bandera de SPAIN
Spain
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Miembro desde dic 29, 2022

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